{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,22]],"date-time":"2025-03-22T04:20:29Z","timestamp":1742617229988,"version":"3.40.2"},"reference-count":34,"publisher":"Wiley","issue":"12","license":[{"start":{"date-parts":[[2012,2,27]],"date-time":"2012-02-27T00:00:00Z","timestamp":1330300800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/onlinelibrary.wiley.com\/termsAndConditions#vor"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["Int J Communication"],"published-print":{"date-parts":[[2013,12]]},"abstract":"<jats:title>SUMMARY<\/jats:title><jats:p>With emergence of various new Internet\u2010enabled devices, such as tablet PCs or smart phones along with their own applications, the traffic growth rate is getting faster and faster these days and demands more communication bandwidth at even faster rate than before. To accommodate this ever\u2010increasing network traffic, even faster Internet routers are required. To respond for these needs, we propose a new mesh of trees based switch architecture, called<jats:italic>MOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>) switch. In addition, we also propose two more variations of<jats:italic>MOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>) to further improve it.<jats:italic>MOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>) is inspired by crossbar with crosspoint buffers. It forms a binary tree for each output line, where each gridpoint buffer<jats:ext-link xmlns:xlink=\"http:\/\/www.w3.org\/1999\/xlink\" xlink:href=\"#dac2328-note-0001\"\/>is a leaf node and each internal node is 2\u2010in 1\u2010out merge buffer<jats:ext-link xmlns:xlink=\"http:\/\/www.w3.org\/1999\/xlink\" xlink:href=\"#dac2328-note-0002\"\/>emulating FIFO queues. Because of this FIFO characteristic of internal buffers,<jats:italic>MOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>) ensures<jats:italic>QoS<\/jats:italic>like FIFO output\u2010queued switch. The root node of the tree for each output line is the only component connected to the output port where each cell is transmitted to output port without any contention. To limit the number of buffers in<jats:italic>MOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>) switch, we present one of its improved (practical) variations,<jats:italic>IMOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>) switch, as well. For<jats:italic>IMOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>) switch architecture, sizes of the buffers in the fabric are limited by a certain amount. As a downside of<jats:italic>IMOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>), however, every cell should go through log<jats:sub>2<\/jats:sub><jats:italic>N<\/jats:italic>\u2009+\u20091 number of buffers in the fabric to be transmitted to the designated output line. Therefore, for even further improvement,<jats:italic>IMOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>) with cut\u2010through, denoted as<jats:italic>IMOTS<\/jats:italic>\u2010<jats:italic>CT<\/jats:italic>(<jats:italic>N<\/jats:italic>), is also proposed in this paper. In<jats:italic>IMOTS<\/jats:italic>\u2010<jats:italic>CT<\/jats:italic>(<jats:italic>N<\/jats:italic>) switch, the cells can cut through one or more empty buffers to be transferred from inputs to outputs with simple 1 or 2\u2009bit signal exchanges between buffers. We analyze the throughput of<jats:italic>MOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>),<jats:italic>IMOTS<\/jats:italic>(<jats:italic>N<\/jats:italic>), and<jats:italic>IMOTS<\/jats:italic>\u2010<jats:italic>CT<\/jats:italic>(<jats:italic>N<\/jats:italic>) switches and show that they can achieve 100% throughput under Bernoulli independent and identically distributed uniform traffic. Our quantitative simulation results validate the theoretical analysis. Copyright \u00a9 2012 John Wiley &amp; Sons, Ltd.<\/jats:p>","DOI":"10.1002\/dac.2328","type":"journal-article","created":{"date-parts":[[2012,2,27]],"date-time":"2012-02-27T06:08:10Z","timestamp":1330322890000},"page":"1543-1561","source":"Crossref","is-referenced-by-count":2,"title":["A high\u2010performance switch architecture based on mesh of trees"],"prefix":"10.1002","volume":"26","author":[{"given":"Hyung Jae","family":"Chang","sequence":"first","affiliation":[{"name":"Department of Computer Science The University of Texas at Dallas USA"}]},{"given":"Guannan","family":"Qu","sequence":"additional","affiliation":[{"name":"College of Computer Science and Technology Jilin University China"}]},{"given":"S.Q.","family":"Zheng","sequence":"additional","affiliation":[{"name":"Department of Computer Science The University of Texas at Dallas USA"}]}],"member":"311","published-online":{"date-parts":[[2012,2,27]]},"reference":[{"key":"e_1_2_9_2_1","doi-asserted-by":"publisher","DOI":"10.1137\/0202019"},{"key":"e_1_2_9_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/161541.161736"},{"key":"e_1_2_9_4_1","doi-asserted-by":"publisher","DOI":"10.1049\/el:19931459"},{"key":"e_1_2_9_5_1","unstructured":"McKeownN.Scheduling algorithms for input\u2010queued cell switches.PhD Thesis UC Berkeley May1995."},{"key":"e_1_2_9_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/90.769767"},{"key":"e_1_2_9_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/35.888261"},{"key":"e_1_2_9_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/49.772430"},{"issue":"1","key":"e_1_2_9_9_1","first-page":"9","article-title":"College admissions and the stability of marriage","volume":"69","author":"Gale D","year":"1962","journal-title":"Mathematical Association of America"},{"key":"e_1_2_9_10_1","doi-asserted-by":"crossref","unstructured":"YoshigeoK ChristensenKJ.A parallel\u2010polled virtual output queued switch with a buffered crossbar.IEEE Workshop on High Performance Switching and Routing Dallas USA 2001;271\u2013275.","DOI":"10.1109\/HPSR.2001.923645"},{"key":"e_1_2_9_11_1","doi-asserted-by":"publisher","DOI":"10.1002\/0471224405"},{"key":"e_1_2_9_12_1","doi-asserted-by":"crossref","unstructured":"Rojas\u2010CessaR OkiE JingZ ChaoHJ.CIXB\u20101: combined input\u2010one\u2010cell\u2010crosspoint buffered switch.Proceedings of IEEE Workshop on High Performance Switching and Routing Dallas USA 2001;324\u2013329.","DOI":"10.1109\/HPSR.2001.923655"},{"key":"e_1_2_9_13_1","doi-asserted-by":"crossref","unstructured":"Rojas\u2010CessaR OkiE ChaoHJ.CIXOB\u2010k: combined input\u2010crosspoint\u2010output buffered packet switch.Proceedings of IEEE GLOBECOM San Antonio USA 2001;2654\u20132660.","DOI":"10.1109\/GLOCOM.2001.966256"},{"key":"e_1_2_9_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2005.858667"},{"key":"e_1_2_9_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCOMM.2003.815665"},{"key":"e_1_2_9_16_1","doi-asserted-by":"crossref","unstructured":"ChrysosN KatevenisM.Weighted fairness in buffered crossbar scheduling.Proceedings of IEEE Workshop on High Performance Switching and Routing Tornino Italy 2003;17\u201322.","DOI":"10.1109\/HPSR.2003.1226674"},{"key":"e_1_2_9_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSAC.2003.810532"},{"key":"e_1_2_9_18_1","unstructured":"ChuangS\u2010T IyerS McKeownN.Practical algorithms for performance guarantees in buffered crossbars.IEEE INFOCOM 2005. 24th Annual Joint Conference of the IEEE Computer and Communications Societies. Proceedings IEEE Miami USA 2005;981\u2013991."},{"key":"e_1_2_9_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/LCOMM.2005.1431173"},{"key":"e_1_2_9_20_1","doi-asserted-by":"crossref","unstructured":"ChrysosN KatevenisM.Crossbars with minimally\u2010sized crosspoint buffers.Proceedings of IEEE Workshop on High Performance Switching and Routing New York USA 2007;1\u20137.","DOI":"10.1109\/HPSR.2007.4281265"},{"key":"e_1_2_9_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNET.2007.900402"},{"key":"e_1_2_9_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/49.44557"},{"key":"e_1_2_9_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.52203"},{"key":"e_1_2_9_24_1","doi-asserted-by":"crossref","unstructured":"OkiE YamanakaN.Scalable crosspoint buffering ATM switch architecture using distributed arbitration scheme.IEEE ATM Workshop 1997 Proceedings Lisboa Protugal 1997;28\u201335.","DOI":"10.1109\/ATM.1997.624648"},{"key":"e_1_2_9_25_1","doi-asserted-by":"crossref","unstructured":"GuptaAK BarbosaLO GeorganasND.16\u2009\u00d7\u200916 limited intermediate buffer switch module for ATM networks.Proceedings of IEEE GLOBECOM Phoenix USA 1991;939\u2013943.","DOI":"10.1109\/GLOCOM.1991.188518"},{"key":"e_1_2_9_26_1","doi-asserted-by":"crossref","unstructured":"LeightonFT.New lower bound techniques for VLSI.Proceedings of the 22nd Annual Symposium on Foundations of Computer Science Nashville TN USA 1981;1\u201312.","DOI":"10.1109\/SFCS.1981.22"},{"volume-title":"Complexity Issues in VLSI: Optimal Layouts for the Shuffle\u2010Exchange Graph and Other Networks","year":"1983","author":"Leighton FT","key":"e_1_2_9_27_1"},{"key":"e_1_2_9_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/357360.357366"},{"key":"e_1_2_9_29_1","unstructured":"NathD.Efficient VLSI networks and parallel algorithms based upon them.PhD Thesis Indian Institute of Technology New Delhi 1982."},{"key":"e_1_2_9_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1983.1676279"},{"volume-title":"Introduction to Parallel Algorithms and Architectures: Array, Trees, Hypercubes","year":"1992","author":"Leighton FT","key":"e_1_2_9_31_1"},{"key":"e_1_2_9_32_1","unstructured":"ZhengSQ.High\u2010speed multi\u2010input FIFO.Technical Report UTDCS\u201004\u201011 University of Texas at Dallas 2011."},{"key":"e_1_2_9_33_1","doi-asserted-by":"publisher","DOI":"10.1002\/dac.1147"},{"key":"e_1_2_9_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/65.372658"},{"key":"e_1_2_9_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2007.253283"}],"container-title":["International Journal of Communication Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/api.wiley.com\/onlinelibrary\/tdm\/v1\/articles\/10.1002%2Fdac.2328","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1002\/dac.2328","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,22]],"date-time":"2025-03-22T00:11:57Z","timestamp":1742602317000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1002\/dac.2328"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,2,27]]},"references-count":34,"journal-issue":{"issue":"12","published-print":{"date-parts":[[2013,12]]}},"alternative-id":["10.1002\/dac.2328"],"URL":"https:\/\/doi.org\/10.1002\/dac.2328","archive":["Portico"],"relation":{},"ISSN":["1074-5351","1099-1131"],"issn-type":[{"type":"print","value":"1074-5351"},{"type":"electronic","value":"1099-1131"}],"subject":[],"published":{"date-parts":[[2012,2,27]]}}}